Field of the Invention
The present invention relates to a power semiconductor component. The power semiconductor component has a semiconductor body. Into one surface of the semiconductor body, a trench is introduced. An electrode device is provided in the trench. A first semiconductor zone of a first conductivity type that adjoins the trench is provided with a first metallization. The first metallization is provided on the surface of the semi-conductor body and is separated from a second semiconductor zone of the first conductivity type by a third semiconductor zone of the second conductivity type, opposite to the first conductivity type, which adjoins the trench. The second semiconductor zone adjoins the lower region of the trench. A power semiconductor component of this type may, for example, be an IGBT (insulated gate bipolar transistor), a special variant of an IGBT, namely an IEGT (injection enhanced gate transistor) or a field-effect transistor. The present invention also relates to a method for fabricating a power semiconductor component of this type.
In IGBTs, the reverse transfer capacitance, i.e. the gate-collector capacitance, which is also known as Miller capacitance, has a significant influence on the on and off switching performance of the component and on its stability in the event of a short circuit. Specifically, a high reverse transfer capacitance leads to longer switching operations and therefore increased switching losses. Moreover, in the event of a short circuit, a capacitance having a negative effect may be produced; this can result in unstable component behavior. An unstable behavior of this type manifests itself, for example, in an increased tendency to oscillate and an uncontrolled rising gate voltage and current (cf. also in this respect I. Omura et al.: IGBT Negative Gate Capacitance and Related Instability Effects, IEEE Electron device Letters, Vol. 18, No. 12, 1997, pages 622-624, and I. Omura et al.: Oscillation Effects in IGBT""s Related to Negative Capacitance Phenomena, IEEE Transactions on Electron Devices, Vol. 46, No. 1, 1999, pages 237-244). It has been found that this undesirable effect of a negative capacitance can in principle be avoided by having a low ratio of the reverse transfer capacitance to the gate-source capacitance.
In a trench IGBT with an n-conducting source zone (or emitter zone), also known as n-source (or n-emitter) for short, a p-body zone, an n-base zone and a p-drain zone (or p-collector zone), especially in the case of a wide n-base zone which is constructed for relatively high voltages of above approximately 1200 V, the gate surface area that adjoins this n-base zone is large, so that there is inevitably also a very high reverse transfer capacitance with the drawbacks that have been outlined above. It should be noted at this point that for a field-effect or MOS transistor it is normal to speak of source, gate and drain, while in the case of an IGBT the corresponding connections are also known as the emitter, gate and collector.
In the following text, first of all the prior art relating to trench IGBTS with reduced reverse transfer capacitance is to be explained with reference to FIGS. 8 to 12.
FIG. 8 shows the basic structure of a trench IGBT (cf. also in this respect, by way of example, FIG. 1 of European Patent No. EP 0 847 090 A2, which corresponds to U.S. Pat. No. 6,072,214, and DE 19 651 108 A1, which corresponds to U.S. patent application Ser. No. 6,218,217B1, and U.S. Pat. Nos. 6,111,290A and 5,894,149A, or U.S. Pat. No. 5,894,149 or U.S. Pat. No. 6,111,290), having a semiconductor body 1, in which an n-base zone 7, a p-base or body zone 8, an n-source or emitter zone 5 and trenches 3 with a gate electrode 4, made, for example, from polycrystalline silicon and a gate insulation layer 30 surrounding this in the trench 3, as well as a p-drain or collector zone 22 are provided.
The conductivity types indicated may, of course, in each case be reversed. This applies in the same way to the following examples relating to the prior art and to the subsequent exemplary embodiments of the invention.
The semiconductor body 1 preferably is made from silicon. However, other semiconductor materials, such as for example SiC AIIIBv, etc. are also conceivable. Examples of dopants for n-type conductivity or p-type conductivity are phosphorus or boron. In this case, it is also possible to use other dopants. This applies in the same way to the following examples and to the exemplary embodiments of the invention.
On a first surface 2 of the semiconductor body 1, there is a source or emitter metallization 6, while on a second, opposite surface 12 of the semiconductor body 1 there is a drain or collector metallization 9. By way of example, aluminum or another suitable contact metal can be used for the metallizations 6, 9. It is also conceivable to use polycrystalline silicon.
The gate electrode 4 is electrically isolated from the metallization 6 by an insulation layer 35. By way of example, silicon dioxide and/or silicon nitride can be used for this insulation layer 35.
For relatively high reverse voltages, the variant of the IGBT that is known as an IEGT, has proven more favorable, because of its reduced forward voltage. IEGTs are described, for example, in U.S. Pat. Nos. 5,329,142, 5,448,083, and 5,585,651.
In these IEGTS, the basic principle involves making a relatively narrow current path available to the holes flowing via the body zones (cf. 8 in FIG. 8) to the front-surface contact (cf. 6 in FIG. 8), so that a high hole current density and therefore a high charge carrier gradient is established below the body zones. This high charge carrier gradient then leads to a high charge carrier flooding in the low-doped n-base zone (cf. 7 in FIG. 8). Since, in particular in the case of a thick n-base zone, i.e. with relatively highly blocking IGBTs, for voltages above approximately 1200 V the voltage drop in the n-base zone dominates the entire forward voltage, it is in this way possible to reduce the forward voltage of the IGBT despite the resistance which opposes the holes in the narrow current path. The narrow current path is generally produced by the fact that the trench IGBT cells are not disposed directly adjacent, but rather have a space between them (c.f. also in this respect British Patent No. GB 2 314 206 or European Patent No. EP 0 813 250 A2, EP 0 847 090 A2 (which corresponds to U.S. Pat. No. 6,072,214) and DE 19 651 108 A1 (which corresponds to U.S. patent application Ser. No. 6,218,217B1, and U.S. Pat. Nos. 6,111,290 and 5,894,149). Specifically, in this respect, FIG. 9 shows an IEGT in which only every third strip of the strip-like trenches 3 contains source or emitter zones 5, while there are no source or emitter zones in the other strips, and the body zones 8 are not connected to the source metallization 6. FIG. 10 shows an IEGT in which the region between the active strips or cells provided with source or emitter zones 5 is filled by a floating p-region 16 that has defused deep into the n-base 7. FIG. 11 shows an IEGT which is similar to the IEGT shown in FIG. 10 but in which an intercell region 14 has been covered by polycrystalline silicon of the gate electrode 4, and FIG. 12 shows an IEGT that is similar to the IEGT shown in FIG. 11, but in this case the polycrystalline silicon of the gate electrode 4 in the intercell region 14 has a stepped profile, that contributes to a reduction in the reverse transfer capacitance.
Nevertheless, all the IEGTs shown in FIGS. 9 to 12 still have a high reverse transfer capacitance. The high reverse transfer capacitance is ultimately attributable to the large surface area of the gate insulation layer 30, which is not required for the MOS channel in the body zone 8.
The reverse transfer capacitance can be reduced in planar IGBTs (i.e. not in trench IGBTs) if the thickness of the gate insulation layer outside the actual channel region, i.e. outside the body zone, is increased (cf. European Patent No. EP 0 837 508 A2). By contrast, in trench IGBTs, the reverse transfer capacitance can be reduced if the electrode disposed in inactive trenches is connected not to the gate potential but rather to the emitter or front-surface potential (cf. DE 19 651 108 A1, which corresponds to U.S. patent app. Ser. No. 6,218,217 or U.S. Pat. No. 5,894,149 and U.S. Pat. No. 6,111,290). However, with a configuration of this type, a large proportion, for example half, of the polycrystalline silicon of the gate electrode is not available for the conductivity of this electrode, and consequently the effective gate resistance is increased undesirably.
U.S. Pat. No. 6,150,675 has disclosed a planar MOS transistor or IGBT in which part of the gate electrode is separated from and connected to the source metallization. Furthermore, U.S. Pat. No. 5,283,201 and U.S. Pat. No. 5,801,417 have disclosed trench transistors in which the lower part of the gate electrode in the trench is separated off and electrically insulated from the gate. In U.S. Pat. No. 5,326,711, a special form of the gate electrode is realized by electrodes in a trench that, in some cases, lie next to one another but are electrically connected to one another. Finally, DE 10 038 177 (which corresponds to PCT/EP 01/08718) shows an MOS transistor having electrodes in a trench that likewise only partially lie next to one another and can be connected to different potentials.
Hitherto, however, there has been no satisfactory solution approach allowing the reverse transfer capacitance to be reduced readily in trench IGBTs without having to accept drawbacks.
It is accordingly an object of the invention to provide a power semiconductor component, an IGBT, an IEGT, a field-effect transistor, and a method for fabricating the semiconductor component that overcome the hereinafore-mentioned disadvantages of the heretofore-known devices of this general type and that provide a power semiconductor component with a trench structure that is distinguished by a greatly reduced reverse transfer capacitance. Moreover, it is intended to provide a method for fabricating a power semiconductor component of this type.
With the foregoing and other objects in view, there is provided, in accordance with the invention, a power semiconductor component of the type described in the introduction but distinguished by the fact that the electrode device includes at least two electrodes which are electrically isolated from one another.
More specifically, a power semiconductor component is disclosed that has a semiconductor body, an electrode device, a metallization, and three semiconductor zones. The semiconductor body has a surface with a trench formed therein. The trench has a lower region. The electrode device is provided in the trench and has two electrodes that are electrically isolated from one another. The metallization is provided on the surface of the semiconductor body. The first semiconductor zone is of a first conductivity type, adjoins the trench, and is provided with the metallization. The second semiconductor zone is of the first conductivity type and adjoins the lower region of the trench. The third semiconductor zone is of a second conductivity type opposite to the first conductivity type, adjoins the trench, and separates the first semiconductor zone from the second semiconductor zone.
With the objects of the invention in view, there is also provided a method according to the invention that includes in particular the following method steps:
(a) etching at least one trench into a semi-conductor body,
(b) producing a gate insulation layer on the surface of the semiconductor body and of the trench,
(c) producing a polycrystalline silicon layer on the gate insulation layer,
(d) depositing a first layer of material that is suitable for masking the polycrystalline silicon layer,
(e) introducing a second layer of material, which is suitable for masking a subsequent etch of the first layer of material, at least in the lower part of the trench,
(f) removing the first layer of material in the region which is not masked by the second layer of material,
(g) removing the second layer of material,
(h) producing an insulating layer on the poly-crystalline silicon layer in the region which is not masked by the first layer of material,
(i) anisotropically etching the polycrystalline silicon layer in the region at the base of the trench which is not masked by the insulation layer,
(j) patterning the polycrystalline silicon layer,
(k) applying a further insulation layer,
(l) etching contact holes through the further insulation layer to the semiconductor body, and
(m) applying a metallization.
In the power semiconductor component with a trench structure according to the invention, which is in particular an IGBT and preferably an IEGT, a large proportion of the reverse transfer capacitance that is present with standard structures is replaced by a source-drain capacitance as a result of the gate electrode device being divided into at least two electrodes which are electrically isolated from one another. Therefore, a change in the drain voltage has only a slight effect on the gate.
The reverse transfer capacitance, which has been considerably reduced in this way, leads to improved controllability of the power semiconductor component and makes it easier to deal with faults, such as for example a short circuit. One advantage, especially compared to the power semiconductor component that is known from DE 19 651 108 A1 (which corresponds to U.S. Pat. Nos. 5,894,149 and 6,111,290), is that only half the area of body zone is required to achieve the same active channel width. In addition to this direct saving on the surface area, therefore, the improved hole accumulation effect also results in a higher charge carrier flooding in the bulk of the semiconductor body and therefore a lower forward voltage.
It is therefore essential to the power semiconductor component according to the invention that the electrode device located in the trench is substantially laterally divided into a part that is connected to the gate and a part that is connected to the source, these two parts being electrically isolated from one another. The two parts may be formed of polycrystalline silicon, and the insulation layer provided between them in order to isolate them may, for example, be made from silicon dioxide and/or silicon nitride or from a plurality of films that are preferably formed from these materials.
The electrode device provided in the trench therefore includes an electrode that is connected to the gate connection and an electrode that is connected to the source metallization. The electrode that is connected to the gate connection extends at least to the depth of the underside of the body zone and preferably substantially as far as the bottom of the trench. The electrode that is connected to the source metallization may have a section that overlaps an intercell region. In this case, the electrode that is connected to the source is preferably connected to the source metallization in this intercell region.
Furthermore, the electrode that is connected to the gate may have a section that at least partially overlaps the electrode that is connected to the source.
The power semiconductor component according to the invention preferably has a strip structure. This means that the trenches extend in strips in the semiconductor body that run substantially parallel to one another. Another possible option for the structuring of the power semiconductor component is for the individual cells or the third semiconductor zones to be in the shape of a square, hexagon or polygon, when seen from above. In this case, the trench and the electrode device laterally surround the third semiconductor zone.
Furthermore, a floating region, i.e. a region with which electrical contact is not made, may be provided in the intercell region. It is also possible to provide an additional trench in the intercell region.
Furthermore, one of the two electrodes may be connected to the gate connection of the power semiconductor component, while the other electrode is connected to an independent connection that is isolated from the gate and source.
In particular, steps (d) to (i) are important in the method according to the invention, since they can be used to isolate the electrode connected to the gate and the electrode connected to the source without the need for an additional photographic technique.
The further polycrystalline silicon layer, which is preferably used to fill the trench, can additionally be used for connection to the gate electrode. For this purpose, the further polycrystalline silicon layer has to be connected to the first polycrystalline silicon layer in an electrically conductive manner.
Other features that are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a power semiconductor component, an IGBT, an IEGT, a field-effect transistor, and a method for fabricating the semiconductor component, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.